Virtualthreading: New computers meta-architecture for direct fine-grained hardware multiprogramming | CEE-SECR 2016 Virtualthreading: New computers meta-architecture for direct fine-grained hardware multiprogramming – CEE-SECR 2016
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Virtualthreading: New computers meta-architecture for direct fine-grained hardware multiprogramming

Significant progress has been made in solving variety of application programming tasks – covering a range as diverse as floating-point arithmetic, video image processing, cryptography, and TCP / IP protocols. This is because of their direct implementation in hardware of computing systems. Programming languages, starting from the Burroughs system, are also widely supported by hardware in a number of mainframes.

At the same time, despite the increasingly widespread parallel computing in almost all applications, system programmers still implement their main task – multiprogramming – mainly by means of software with induces unnecessarily large overheads due to weak hardware support, based on interruptions. The report highlights the main reason of these overheads, so called “Silicone Curtain” – the technique of organizing computing systems on the basis of coarse-grained swapping of software threads, as single entities on hardware resources. Instead, the report offers an alternative technique, based on fine-grained swapping of software threads, as swapping of single instructions – so called virtual-threading meta-architecture. The report offers the description of the implementation of the related Verilog-project and some initial results of its modelling and prototyping.

The report is aimed at hardware designers and system programmers, which are interested in the development of innovative computing systems, where main kernel functions of operating systems are implemented by means of hardware (thus eliminating the aforementioned “Silicone Curtain”), as opposed to the existing computing systems, where such functions are implemented by means of software. Such innovative systems should have higher processing efficiency and should provide significant simplification of system and application software design. The author of the report encourages hardware designers and system programmers to take part in the discussion of the report’s proposals. Creation of a joint working group to carry out a pilot project in the proposed area could be the best outcome of such discussion.

Andrei Yafimau

Andrei Yafimau


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